S.M. Reddy

Researcher Next ID · RN-037412

Researcher · Computer Science

Bengaluru, India

Accepting doctoral researchersFunding unknown

Research interests

Computer Science

Engineering

VLSI and Analog Circuit Testing

Integrated Circuits and Semiconductor Failure Analysis

Radiation Effects in Electronics

Low-power high-performance VLSI design

VLSI and FPGA Design Techniques

Preferred Fill: A Scalable Method to Reduce Capture Power for Scan Based Designs
Proceedings/Proceedings - International Test Conference · 2006 · https://doi.org/10.1109/test.2006.297694
COMPACTEST: A METHOD TO GENERATE COMPACT TEST SETS FOR COMBINATIONAL CIRCUITS
Journal · 2005 · https://doi.org/10.1109/test.1991.519510
Techniques for minimizing power dissipation in scan and combinational circuits during test application
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1998 · https://doi.org/10.1109/43.736572
On Delay Fault Testing in Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1987 · https://doi.org/10.1109/tcad.1987.1270315
Easily Testable Realizations ror Logic Functions
IEEE Transactions on Computers · 1972 · https://doi.org/10.1109/t-c.1972.223475

No projects listed.