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João Antônio Martino

Researcher Next ID · RN-037803

Researcher · Engineering

Universidade de São Paulo

São Paulo, Brazil

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Accepting doctoral researchersFunding unknown
Works count
690
Citation count
3,116
H-index
25
i10-index
82

Research interests

Engineering
Advancements in Semiconductor Devices and Circuit Design
Semiconductor materials and devices
Silicon Carbide Semiconductor Technologies
Integrated Circuits and Semiconductor Failure Analysis
Nanowire Synthesis and Applications

Publications

  • Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source

    IEEE Transactions on Electron Devices · 2016 · 10.1109/ted.2016.2533360

  • InGaAs tunnel FET with sub-nanometer EOT and sub-60 mV/dec sub-threshold swing at room temperature

    Applied Physics Letters · 2016 · 10.1063/1.4971830

  • Study of line-TFET analog performance comparing with other TFET and MOSFET architectures

    Solid-State Electronics · 2016 · 10.1016/j.sse.2016.10.021

  • Low-frequency noise assessment in advanced UTBOX SOI nMOSFETs with different gate dielectrics

    Solid-State Electronics · 2014 · 10.1016/j.sse.2014.04.034

  • Influence of the Source Composition on the Analog Performance Parameters of Vertical Nanowire-TFETs

    IEEE Transactions on Electron Devices · 2014 · 10.1109/ted.2014.2367659

  • Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature

    IEEE Transactions on Electron Devices · 2013 · 10.1109/ted.2013.2267614

  • Temperature impact on the tunnel fet off-state current components

    Solid-State Electronics · 2012 · 10.1016/j.sse.2012.05.053

  • Evaluation of triple-gate FinFETs with SiO2–HfO2–TiN gate stack under analog operation

    Solid-State Electronics · 2007 · 10.1016/j.sse.2007.01.012

  • Advantages of the Graded-Channel SOI FD MOSFET for Application as a Quasi-Linear Resistor

    IEEE Transactions on Electron Devices · 2005 · 10.1109/ted.2005.846327

  • Analog circuit design using graded-channel silicon-on-insulator nMOSFETs

    Solid-State Electronics · 2002 · 10.1016/s0038-1101(02)00020-5

  • Graded-channel fully depleted Silicon-On-Insulator nMOSFET for reducing the parasitic bipolar effects

    Solid-State Electronics · 2000 · 10.1016/s0038-1101(00)00032-0

  • Analog performance and application of graded-channel fully depleted SOI MOSFETs

    Solid-State Electronics · 2000 · 10.1016/s0038-1101(00)00034-4

Current projects

    No projects listed.